Improved cascaded h‐bridge multilevel inverters with voltage‐boosting capability

Lee, SS; Yang, Y; Siwakoti, YP; Barzegarkhoo, R

Improved cascaded h‐bridge multilevel inverters with voltage‐boosting capability

Lee, SS Yang, Y Siwakoti, YP Barzegarkhoo, R

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Publisher:: MDPI AG
Publication Type:: Journal Article
Citation:: Electronics, 2021, 10, (22), pp. 1-10
Issue Date:: 2021-11-01

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Field	Value	Language
dc.contributor.author	Lee, SS
dc.contributor.author	Yang, Y
dc.contributor.author	Siwakoti, YP
dc.contributor.author	Barzegarkhoo, R
dc.date.accessioned	2022-05-04T21:58:52Z
dc.date.available	2022-05-04T21:58:52Z
dc.date.issued	2021-11-01
dc.identifier.citation	Electronics, 2021, 10, (22), pp. 1-10
dc.identifier.issn	2079-9292
dc.identifier.issn	2079-9292
dc.identifier.uri	http://hdl.handle.net/10453/157018
dc.description.abstract	This paper proposes two improved cascaded H‐bridge (ICHB) multilevel inverters that feature voltage‐boosting capability. The conventional H‐bridge with a front‐end dc–dc boost converter was restructured for single‐stage operation. The developed three‐level topology not only saves one power switch but also exhibits lower voltage stress across its capacitor. Extension to five-level generation was also introduced by merely adding two power switches and one capacitor. The final five‐level topology outperforms the classical cascaded H‐bridge (CHB) multilevel inverter with a significant reduction in the power switch count, with a 42% and 50% reduction in both the isolated dc source and inductor counts. The power efficiency was also improved without compromising the modularity feature of the classical CHB multilevel inverter. The operation and theoretical analysis of the proposed topologies were validated via simulations and experimental tests.
dc.language	English
dc.publisher	MDPI AG
dc.relation.ispartof	Electronics
dc.relation.isbasedon	10.3390/electronics10222801
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	0906 Electrical and Electronic Engineering
dc.title	Improved cascaded h‐bridge multilevel inverters with voltage‐boosting capability
dc.type	Journal Article
utslib.citation.volume	10
utslib.for	0906 Electrical and Electronic Engineering
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
utslib.copyright.status	open_access	*
pubs.consider-herdc	false
dc.date.updated	2022-05-04T21:58:47Z
pubs.issue	22
pubs.publication-status	Published
pubs.volume	10
utslib.citation.issue	22

Abstract:

This paper proposes two improved cascaded H‐bridge (ICHB) multilevel inverters that feature voltage‐boosting capability. The conventional H‐bridge with a front‐end dc–dc boost converter was restructured for single‐stage operation. The developed three‐level topology not only saves one power switch but also exhibits lower voltage stress across its capacitor. Extension to five-level generation was also introduced by merely adding two power switches and one capacitor. The final five‐level topology outperforms the classical cascaded H‐bridge (CHB) multilevel inverter with a significant reduction in the power switch count, with a 42% and 50% reduction in both the isolated dc source and inductor counts. The power efficiency was also improved without compromising the modularity feature of the classical CHB multilevel inverter. The operation and theoretical analysis of the proposed topologies were validated via simulations and experimental tests.

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http://hdl.handle.net/10453/157018