A Low Noise Amplifier Optimized for a GPS Receiver RF Front End

Van Schaik, A; Dong, XF; Jin, C

A Low Noise Amplifier Optimized for a GPS Receiver RF Front End

Van Schaik, A Dong, XF Jin, C

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Publication Type:: Conference
Issue Date:: 2007-03-12T22:05:40Z

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Field	Value	Language
dc.contributor.author	Van Schaik, A	en_AU
dc.contributor.author	Dong, XF	en_AU
dc.contributor.author	Jin, C	en_AU
dc.date.accessioned	2007-03-12T22:05:40Z
dc.date.accessioned	2012-12-15T02:29:38Z
dc.date.available	2007-03-12T22:05:40Z
dc.date.available	2012-12-15T02:29:38Z
dc.date.issued	2007-03-12T22:05:40Z
dc.identifier.uri	http://hdl.handle.net/10453/19606
dc.description.abstract	A cascode LNA was optimized for a GPS receiver radio frequency front end using a 0.18 μm CMOS technology. By careful choice of device geometry, gate and source degeneration inductors, a fully integrated LNA can be optimized to have a low noise figure, a high voltage gain and a wide dynamic range. The optimized LNA has a 1.512 dB noise figure, a –42.05 dB S11, a 20.04 dB voltage gain a –19.82 dB input referred 1-db compression point and a –5.49 dBm third order input intercept point, with a 11.6 mW power consumption.	en_AU
dc.format.extent	133095 bytes
dc.format.mimetype	application/pdf
dc.language.iso	en_AU
dc.relation.replaces	http://hdl.handle.net/2100/118
dc.title	A Low Noise Amplifier Optimized for a GPS Receiver RF Front End	en_AU
dc.type	Conference
utslib.copyright.status	open_access

Abstract:

A cascode LNA was optimized for a GPS receiver radio frequency front end using a 0.18 μm CMOS technology. By careful choice of device geometry, gate and source degeneration inductors, a fully integrated LNA can be optimized to have a low noise figure, a high voltage gain and a wide dynamic range. The optimized LNA has a 1.512 dB noise figure, a –42.05 dB S11, a 20.04 dB voltage gain a –19.82 dB input referred 1-db compression point and a –5.49 dBm third order input intercept point, with a 11.6 mW power consumption.

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http://hdl.handle.net/10453/19606