Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraint

Khoo, IH; Reddy, HC; Van, LD; Lin, CT

Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraint

Khoo, IH Reddy, HC Van, LD Lin, CT

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Publication Type:: Conference Proceeding
Citation:: Midwest Symposium on Circuits and Systems, 2013, pp. 999 - 1002
Issue Date:: 2013-12-01

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Field	Value	Language
dc.contributor.author	Khoo, IH	en_US
dc.contributor.author	Reddy, HC	en_US
dc.contributor.author	Van, LD	en_US
dc.contributor.author	Lin, CT https://orcid.org/0000-0001-8371-8197	en_US
dc.date.issued	2013-12-01	en_US
dc.identifier.citation	Midwest Symposium on Circuits and Systems, 2013, pp. 999 - 1002	en_US
dc.identifier.isbn	9781479900664	en_US
dc.identifier.issn	1548-3746	en_US
dc.identifier.uri	http://hdl.handle.net/10453/120925
dc.description.abstract	A design approach is presented for 2-D digital filters possessing approximate quadrantal magnitude symmetry without the constraint of the denominator having only 1-D separable factors. To ensure the BIBO stability of the filter, the planar least square inverse stabilization approach is employed. It is illustrated through design examples that the proposed approach results in filters with sharper transition band and lower error relative to the given filter specifications. Also, for certain cases, it is shown that a lower order non-separable denominator design can achieve the same result as a higher order separable denominator design, thus providing savings in the number of multipliers. Finally, 2-D VLSI realizations without global broadcast are presented for the optimized transfer function with non-separable denominator factors and approximate quadrantal symmetry. © 2013 IEEE.	en_US
dc.relation.ispartof	Midwest Symposium on Circuits and Systems	en_US
dc.relation.isbasedon	10.1109/MWSCAS.2013.6674820	en_US
dc.title	Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraint	en_US
dc.type	Conference Proceeding
utslib.for	0902 Automotive Engineering	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Computer Science
pubs.organisational-group	/University of Technology Sydney/Strength - CAI - Centre for Artificial Intelligence
utslib.copyright.status	closed_access
pubs.publication-status	Published	en_US

Abstract:

A design approach is presented for 2-D digital filters possessing approximate quadrantal magnitude symmetry without the constraint of the denominator having only 1-D separable factors. To ensure the BIBO stability of the filter, the planar least square inverse stabilization approach is employed. It is illustrated through design examples that the proposed approach results in filters with sharper transition band and lower error relative to the given filter specifications. Also, for certain cases, it is shown that a lower order non-separable denominator design can achieve the same result as a higher order separable denominator design, thus providing savings in the number of multipliers. Finally, 2-D VLSI realizations without global broadcast are presented for the optimized transfer function with non-separable denominator factors and approximate quadrantal symmetry. © 2013 IEEE.

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http://hdl.handle.net/10453/120925