A folded-switching mixer in SOI CMOS technology
- Publication Type:
- Conference Proceeding
- Midwest Symposium on Circuits and Systems, 2012, pp. 458 - 461
- Issue Date:
A wideband 3.5 to 5.5GHz low voltage folded-switching mixer is implemented in 0.25um SOI CMOS technology. The post-layout simulation of the designed mixer at 4.5GHz has noise figure (NF) of 9.6dB, input IP3 of -9dBm, conversion gain (CG) of 10.9dB and total current consumption including bias is 4.5mA under 1.5V supply voltage. The designed mixer can also operate under 1V supply voltage with relatively small linear performances degradation. The chip area is 0.55×0.5mm 2. Due to high-resistivity silicon substrate, buried oxide isolation and low threshold voltage, SOI CMOS technology offers significant performance improvements for mixers, which makes the designed mixer well suitable for low voltage and low power applications. © 2012 IEEE.
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