Design of on-chip quadrature hybrid (3dB) branch-line couplers in 0.13-μm SiGe technology for millimetre-wave applications

Bautista, MG; Zhu, JB; Zhu, F; Yang, Y; Dutkiewicz, E

Design of on-chip quadrature hybrid (3dB) branch-line couplers in 0.13-μm SiGe technology for millimetre-wave applications

Bautista, MG Zhu, JB Zhu, F

Yang, Y

Dutkiewicz, E

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Publication Type:: Conference Proceeding
Citation:: 2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017, 2017, 2018-January pp. 1 - 5
Issue Date:: 2017-07-01

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Field	Value	Language
dc.contributor.author	Bautista, MG	en_US
dc.contributor.author	Zhu, JB	en_US
dc.contributor.author	Zhu, F https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Yang, Y https://orcid.org/0000-0001-7439-2156	en_US
dc.contributor.author	Dutkiewicz, E https://orcid.org/0000-0002-4268-9286	en_US
dc.date.issued	2017-07-01	en_US
dc.identifier.citation	2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017, 2017, 2018-January pp. 1 - 5	en_US
dc.identifier.isbn	9781509065141	en_US
dc.identifier.uri	http://hdl.handle.net/10453/126745
dc.description.abstract	© 2017 IEEE. In this paper, design of miniaturized on-chip quadrature hybrid branch-line coupler is investigated. The motivation of this work is to minimize the footprint of the designed coupler while maintaining high performance of the circuit in the mm-wave band spectrum. Three examples are implemented in a standard (Bi)-CMOS process for millimetre wave applications. Excluding the pads, the chip size of the conventional design is 0.35 mm2, and the proposed two other designs structures are 0.26 mm2 and 0.21 mm2, respectively, which indicates an area reduction by 13% and 30% respectively.	en_US
dc.relation.ispartof	2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017	en_US
dc.relation.isbasedon	10.1109/ISCIT.2017.8261191	en_US
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	Design of on-chip quadrature hybrid (3dB) branch-line couplers in 0.13-μm SiGe technology for millimetre-wave applications	en_US
dc.type	Conference Proceeding
utslib.citation.volume	2018-January	en_US
utslib.for	090601 Circuits and Systems	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/DVC (Research)
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
utslib.copyright.status	closed_access	*
pubs.publication-status	Published	en_US
pubs.volume	2018-January	en_US

Abstract:

© 2017 IEEE. In this paper, design of miniaturized on-chip quadrature hybrid branch-line coupler is investigated. The motivation of this work is to minimize the footprint of the designed coupler while maintaining high performance of the circuit in the mm-wave band spectrum. Three examples are implemented in a standard (Bi)-CMOS process for millimetre wave applications. Excluding the pads, the chip size of the conventional design is 0.35 mm2, and the proposed two other designs structures are 0.26 mm2 and 0.21 mm2, respectively, which indicates an area reduction by 13% and 30% respectively.

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http://hdl.handle.net/10453/126745