Design of On-Chip Edge-Coupled Resonator and Its Application for Bandpass Filter in CMOS Technology

Bautista, MG; Zhang, XP; Zhu, X; Dutkiewicz, E

Design of On-Chip Edge-Coupled Resonator and Its Application for Bandpass Filter in CMOS Technology

Bautista, MG Zhang, XP Zhu, X

Dutkiewicz, E

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Publication Type:: Conference Proceeding
Citation:: ISCIT 2018 - 18th International Symposium on Communication and Information Technology, 2018, pp. 137 - 140
Issue Date:: 2018-12-24

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Field	Value	Language
dc.contributor.author	Bautista, MG	en_US
dc.contributor.author	Zhang, XP	en_US
dc.contributor.author	Zhu, X https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Dutkiewicz, E https://orcid.org/0000-0002-4268-9286	en_US
dc.date.issued	2018-12-24	en_US
dc.identifier.citation	ISCIT 2018 - 18th International Symposium on Communication and Information Technology, 2018, pp. 137 - 140	en_US
dc.identifier.isbn	9781538684580	en_US
dc.identifier.uri	http://hdl.handle.net/10453/133761
dc.description.abstract	© 2018 IEEE. In this work, the design of a compact on-chip edge-coupled resonator is presented. To understand the insight of the presented resonator, a simplified LC-equivalent circuit model is provided, and electromagnetic simulation is utilized for performance optimization. To demonstrate the potential of the presented resonator, a bandpass filter design example is also given. By taking advantage of using metal-insulator-metal capacitors, a compact filter can be designed. For proving of concept, both the presented resonator and filter are implemented and fabricated using standard CMOS technology. A good agreement between simulation and measurement has been achieved. The measured results show that the filter has a resonance at 35.4 GHz with an insertion loss of 1.7 dB and greater than-10 dB of return loss. The miniaturized chip area of both the resonator and the BPF, excluding the pads, is only 0.039 mm 2 (0.15 × 0.26 mm 2 ).	en_US
dc.relation.ispartof	ISCIT 2018 - 18th International Symposium on Communication and Information Technology	en_US
dc.relation.isbasedon	10.1109/ISCIT.2018.8587994	en_US
dc.rights	info:eu-repo/semantics/restrictedAccess
dc.title	Design of On-Chip Edge-Coupled Resonator and Its Application for Bandpass Filter in CMOS Technology	en_US
dc.type	Conference Proceeding
utslib.for	0805 Distributed Computing	en_US
utslib.for	0906 Electrical and Electronic Engineering	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/DVC (Research)
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
utslib.copyright.status	in_progress	*
pubs.publication-status	Published	en_US

Abstract:

© 2018 IEEE. In this work, the design of a compact on-chip edge-coupled resonator is presented. To understand the insight of the presented resonator, a simplified LC-equivalent circuit model is provided, and electromagnetic simulation is utilized for performance optimization. To demonstrate the potential of the presented resonator, a bandpass filter design example is also given. By taking advantage of using metal-insulator-metal capacitors, a compact filter can be designed. For proving of concept, both the presented resonator and filter are implemented and fabricated using standard CMOS technology. A good agreement between simulation and measurement has been achieved. The measured results show that the filter has a resonance at 35.4 GHz with an insertion loss of 1.7 dB and greater than-10 dB of return loss. The miniaturized chip area of both the resonator and the BPF, excluding the pads, is only 0.039 mm 2 (0.15 × 0.26 mm 2 ).

Please use this identifier to cite or link to this item:

http://hdl.handle.net/10453/133761