A CMOS implemented transimpedance amplifier design for optical communications

Hora, JA; Piandong, DL; Empas, PEG; Gerasta, OJL; Zhu, X; Dutkiewicz, E

A CMOS implemented transimpedance amplifier design for optical communications

Hora, JA

Piandong, DL Empas, PEG Gerasta, OJL Zhu, X

Dutkiewicz, E

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Publication Type:: Conference Proceeding
Citation:: 2018 IEEE 10th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2018, 2019
Issue Date:: 2019-03-12

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	Camera_Ready_Paper#104_A_CMOS_Implemented_Transimpedance Amplifier_edited_6pages_UTS_FINAL.pdf	Published version	1.38 MB	Adobe PDF	View/Open

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Field	Value	Language
dc.contributor.author	Hora, JA https://orcid.org/0000-0001-9323-1518	en_US
dc.contributor.author	Piandong, DL	en_US
dc.contributor.author	Empas, PEG	en_US
dc.contributor.author	Gerasta, OJL	en_US
dc.contributor.author	Zhu, X https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Dutkiewicz, E https://orcid.org/0000-0002-4268-9286	en_US
dc.date.issued	2019-03-12	en_US
dc.identifier.citation	2018 IEEE 10th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2018, 2019	en_US
dc.identifier.isbn	9781538677674	en_US
dc.identifier.uri	http://hdl.handle.net/10453/134248
dc.description.abstract	© 2018 IEEE. A transimpedance amplifier for optical communication system is presented in this study. The design includes a regulated cascode and an interleaving active feedback to improve the bandwidth of the transimpedance amplifier. Multiple gain stages are also employed to greatly improve the output voltage. This is implemented in 32 nm CMOS technology using Custom Designer from Synopsys. The circuit is designed to compete with existing transimpedance amplifiers implemented in other technologies in the field of optical communications. The transimpedance amplifier design in this study has a gain of 54 dB and a bandwidth of 9.39 GHz. The layout measures 0.0011mm2 in area and the total power dissipated is 2.94 mW.	en_US
dc.relation.ispartof	2018 IEEE 10th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2018	en_US
dc.relation.isbasedon	10.1109/HNICEM.2018.8666413	en_US
dc.title	A CMOS implemented transimpedance amplifier design for optical communications	en_US
dc.type	Conference Proceeding
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
pubs.organisational-group	/University of Technology Sydney/Students
utslib.copyright.status	closed_access
pubs.publication-status	Published	en_US

Abstract:

© 2018 IEEE. A transimpedance amplifier for optical communication system is presented in this study. The design includes a regulated cascode and an interleaving active feedback to improve the bandwidth of the transimpedance amplifier. Multiple gain stages are also employed to greatly improve the output voltage. This is implemented in 32 nm CMOS technology using Custom Designer from Synopsys. The circuit is designed to compete with existing transimpedance amplifiers implemented in other technologies in the field of optical communications. The transimpedance amplifier design in this study has a gain of 54 dB and a bandwidth of 9.39 GHz. The layout measures 0.0011mm2 in area and the total power dissipated is 2.94 mW.

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http://hdl.handle.net/10453/134248