A Highly Linear OTA with 759 μs gm for RF Transceiver Application

Hora, JA; Darell Ang, J; Zhu, X; Dutkiewicz, E

A Highly Linear OTA with 759 μs gm for RF Transceiver Application

Hora, JA

Darell Ang, J Zhu, X

Dutkiewicz, E

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Publication Type:: Conference Proceeding
Citation:: Proceedings - 2019 19th International Symposium on Communications and Information Technologies, ISCIT 2019, 2019, pp. 595 - 598
Issue Date:: 2019-09-01

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Field	Value	Language
dc.contributor.author	Hora, JA https://orcid.org/0000-0001-9323-1518	en_US
dc.contributor.author	Darell Ang, J	en_US
dc.contributor.author	Zhu, X https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Dutkiewicz, E https://orcid.org/0000-0002-4268-9286	en_US
dc.date.issued	2019-09-01	en_US
dc.identifier.citation	Proceedings - 2019 19th International Symposium on Communications and Information Technologies, ISCIT 2019, 2019, pp. 595 - 598	en_US
dc.identifier.isbn	9781728150093	en_US
dc.identifier.uri	http://hdl.handle.net/10453/138222
dc.description.abstract	© 2019 IEEE. This paper presents a design of a highly linear fully differential operational transconductance amplifier (OTA) in 65nm CMOS Technology Process for RF transceiver application. To improve the linearity and the output common-mode voltage of the design OTA, a cross-coupled differential pair, and differential active loading were applied, respectively. The cross-coupled differential pair was taken from a single-ended OTA and utilized to form a fully differential OTA topology with two current mirrors. The presented OTA has a constant transconductance (gm) of 759 μS at Vin of 0V, a VDD of 1.2V and is linear at input voltages of -0.5V to 0.5V. The OTA core circuit has a gain of 22.4 dB, and unity-gain bandwidth of 280 MHz at a load of 0.2 pF and control voltage of 0.5V. The output common-mode voltage is kept close to Vdd/2 of 0.6V. The final circuit layout of the transconductance core with negative resistance circuit has dimensions of 37.22 μm x 64.59 μm. This paper also presents a pseudo-differential topology OTA for comparison purposes.	en_US
dc.relation.ispartof	Proceedings - 2019 19th International Symposium on Communications and Information Technologies, ISCIT 2019	en_US
dc.relation.isbasedon	10.1109/ISCIT.2019.8905115	en_US
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	A Highly Linear OTA with 759 μs gm for RF Transceiver Application	en_US
dc.type	Conference Proceeding
utslib.for	100504 Data Communications	en_US
utslib.for	0906 Electrical and Electronic Engineering	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
pubs.organisational-group	/University of Technology Sydney/Students
utslib.copyright.status	closed_access	*
pubs.publication-status	Published	en_US

Abstract:

© 2019 IEEE. This paper presents a design of a highly linear fully differential operational transconductance amplifier (OTA) in 65nm CMOS Technology Process for RF transceiver application. To improve the linearity and the output common-mode voltage of the design OTA, a cross-coupled differential pair, and differential active loading were applied, respectively. The cross-coupled differential pair was taken from a single-ended OTA and utilized to form a fully differential OTA topology with two current mirrors. The presented OTA has a constant transconductance (gm) of 759 μS at Vin of 0V, a VDD of 1.2V and is linear at input voltages of -0.5V to 0.5V. The OTA core circuit has a gain of 22.4 dB, and unity-gain bandwidth of 280 MHz at a load of 0.2 pF and control voltage of 0.5V. The output common-mode voltage is kept close to Vdd/2 of 0.6V. The final circuit layout of the transconductance core with negative resistance circuit has dimensions of 37.22 μm x 64.59 μm. This paper also presents a pseudo-differential topology OTA for comparison purposes.

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http://hdl.handle.net/10453/138222