Multi-port Power Combining Grid Array Antenna on Fan-out Wafer Level Packaging

Chen, Z; Zhu, X; Zhong, L

Multi-port Power Combining Grid Array Antenna on Fan-out Wafer Level Packaging

Chen, Z Zhu, X

Zhong, L

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Publisher:: IEEE
Publication Type:: Conference Proceeding
Citation:: 2020 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications, IMWS-AMP 2020 - Proceedings, 2020, 00, pp. 1-3
Issue Date:: 2020-07-01

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Field	Value	Language
dc.contributor.author	Chen, Z
dc.contributor.author	Zhu, X https://orcid.org/0000-0002-5814-394X
dc.contributor.author	Zhong, L
dc.date	2020-07-29
dc.date.accessioned	2021-06-15T00:53:15Z
dc.date.available	2021-06-15T00:53:15Z
dc.date.issued	2020-07-01
dc.identifier.citation	2020 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications, IMWS-AMP 2020 - Proceedings, 2020, 00, pp. 1-3
dc.identifier.isbn	9781728160641
dc.identifier.uri	http://hdl.handle.net/10453/149513
dc.description.abstract	This paper presents multi-port power combining grid array antenna on fan-out wafer level packaging (FOWLP). The size of the package is 9 x 9 x 0.35 mm3. The microstrip grid array antenna is chosen as the multi-port antenna radiator. The antenna shows high design flexibility. The feeding port are set symmetrically on the cross points of the short sides and long sides and are fed differentially. The distance of the ports are determined by the chip size. A four port microstrip grid array antenna is integrated with a chip of 3×3×0.1 mm3. The simulation results show the maximal peak realized gain is 14.75 dBi and the -10 dB input impedance bandwidth is 13.9 GHz.
dc.language	en
dc.publisher	IEEE
dc.relation.ispartof	2020 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications, IMWS-AMP 2020 - Proceedings
dc.relation.ispartof	IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP)
dc.relation.isbasedon	10.1109/IMWS-AMP49156.2020.9199675
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	Multi-port Power Combining Grid Array Antenna on Fan-out Wafer Level Packaging
dc.type	Conference Proceeding
utslib.citation.volume	00
utslib.location.activity	China
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
utslib.copyright.status	closed_access	*
pubs.consider-herdc	false
dc.date.updated	2021-06-15T00:53:14Z
pubs.finish-date	2020-07-31
pubs.publication-status	Published
pubs.start-date	2020-07-29
pubs.volume	00

Abstract:

This paper presents multi-port power combining grid array antenna on fan-out wafer level packaging (FOWLP). The size of the package is 9 x 9 x 0.35 mm3. The microstrip grid array antenna is chosen as the multi-port antenna radiator. The antenna shows high design flexibility. The feeding port are set symmetrically on the cross points of the short sides and long sides and are fed differentially. The distance of the ports are determined by the chip size. A four port microstrip grid array antenna is integrated with a chip of 3×3×0.1 mm3. The simulation results show the maximal peak realized gain is 14.75 dBi and the -10 dB input impedance bandwidth is 13.9 GHz.

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http://hdl.handle.net/10453/149513