Synthesis of Arbitrary Quantum Circuits to Topological Assembly.

Paler, A; Devitt, SJ; Fowler, AG

Synthesis of Arbitrary Quantum Circuits to Topological Assembly.

Paler, A Devitt, SJ Fowler, AG

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Publisher:: NATURE PUBLISHING GROUP
Publication Type:: Journal Article
Citation:: Sci Rep, 2016, 6, (1), pp. 30600
Issue Date:: 2016-08-02

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Field	Value	Language
dc.contributor.author	Paler, A
dc.contributor.author	Devitt, SJ
dc.contributor.author	Fowler, AG
dc.date.accessioned	2022-07-29T01:30:20Z
dc.date.available	2016-07-04
dc.date.available	2022-07-29T01:30:20Z
dc.date.issued	2016-08-02
dc.identifier.citation	Sci Rep, 2016, 6, (1), pp. 30600
dc.identifier.issn	2045-2322
dc.identifier.issn	2045-2322
dc.identifier.uri	http://hdl.handle.net/10453/159345
dc.description.abstract	Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec.
dc.format	Electronic
dc.language	eng
dc.publisher	NATURE PUBLISHING GROUP
dc.relation.ispartof	Sci Rep
dc.relation.isbasedon	10.1038/srep30600
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	Synthesis of Arbitrary Quantum Circuits to Topological Assembly.
dc.type	Journal Article
utslib.citation.volume	6
utslib.location.activity	England
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Strength - QSI - Centre for Quantum Software and Information
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Computer Science
utslib.copyright.status	closed_access	*
dc.date.updated	2022-07-29T01:30:17Z
pubs.issue	1
pubs.publication-status	Published online
pubs.volume	6
utslib.citation.issue	1

Abstract:

Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec.

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http://hdl.handle.net/10453/159345