A comparative study of steganography designs based on multiple FPGA platforms
- Publisher:
- Inderscience Publishers
- Publication Type:
- Journal Article
- Citation:
- International Journal of Electronic Security and Digital Forensics, 2016, 8, (2), pp. 164-190
- Issue Date:
- 2016-01-01
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| Filename | Description | Size | |||
|---|---|---|---|---|---|
| ijesdf.2016.075589.pdf | Published version | 544.56 kB |
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Steganography methods conceal covert messages inside communicated data. Field-programmable gate array (FPGA) hardware implementation provides speed, flexibility and configurability. It is extremely difficult to compare published results from different platforms and technologies. The goal of our research work is to mitigate the dependency by examining implementations from multiple FPGA platforms. The research studies the implementations of 12 spatial steganography methods using Altera and Xilinx FPGAs. The methods include mix-bit LSB, least significant bit (LSB), random LSB and texture-based algorithms. The objective of the research is to develop platform-independent resources, timing, power and energy models; to empower future steganography research. Further, the article evaluates steganography methods using typical performance metrics as well as a novel performance metric. The results suggest that the mix-bit methods exhibit good performance across most of the metrics. However, when image quality is a concern, the two-bit LSB is the front runner.
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