Design and implementation of low loss and compact microstrip triplexer using CSRR loaded coupled lines

Keshavarz, S; Abdipour, A; Mohammadi, A; Keshavarz, R

Design and implementation of low loss and compact microstrip triplexer using CSRR loaded coupled lines

Keshavarz, S Abdipour, A Mohammadi, A Keshavarz, R

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Publisher:: ELSEVIER GMBH
Publication Type:: Journal Article
Citation:: AEU - International Journal of Electronics and Communications, 2019, 111
Issue Date:: 2019-11-01

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Field	Value	Language
dc.contributor.author	Keshavarz, S
dc.contributor.author	Abdipour, A
dc.contributor.author	Mohammadi, A
dc.contributor.author	Keshavarz, R https://orcid.org/0000-0002-3880-6769
dc.date.accessioned	2022-08-31T22:26:55Z
dc.date.available	2022-08-31T22:26:55Z
dc.date.issued	2019-11-01
dc.identifier.citation	AEU - International Journal of Electronics and Communications, 2019, 111
dc.identifier.issn	1434-8411
dc.identifier.issn	1618-0399
dc.identifier.uri	http://hdl.handle.net/10453/161147
dc.description.abstract	In this paper, a passive S-band triplexer using complementary split ring resonators (CSRRs) etched on the ground plane and interdigital capacitor in the upper metal is presented. The proposed structure is designed with three output ports operating at three distinct center frequencies of 1.4 GHz, 1.8 GHz and 3.2 GHz, which are suitable for multiband receivers working at LTE bands. The proposed triplexer is simulated, fabricated and measured. Simulation and experimental results of scattering parameters are in good agreement. This structure comprises these specifications: insertion loss less than 2 dB, isolation between channels approximately 20 dB and about 5% fractional bandwidth regarding VSWR < 1.5. The proposed triplexer's dimensions are 0.07λ0 × 0.2λ0.
dc.language	English
dc.publisher	ELSEVIER GMBH
dc.relation.ispartof	AEU - International Journal of Electronics and Communications
dc.relation.isbasedon	10.1016/j.aeue.2019.152913
dc.rights	info:eu-repo/semantics/closedAccess
dc.subject	0906 Electrical and Electronic Engineering
dc.subject.classification	Networking & Telecommunications
dc.title	Design and implementation of low loss and compact microstrip triplexer using CSRR loaded coupled lines
dc.type	Journal Article
utslib.citation.volume	111
utslib.for	0906 Electrical and Electronic Engineering
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
utslib.copyright.status	closed_access	*
dc.date.updated	2022-08-31T22:26:41Z
pubs.publication-status	Published
pubs.volume	111

Abstract:

In this paper, a passive S-band triplexer using complementary split ring resonators (CSRRs) etched on the ground plane and interdigital capacitor in the upper metal is presented. The proposed structure is designed with three output ports operating at three distinct center frequencies of 1.4 GHz, 1.8 GHz and 3.2 GHz, which are suitable for multiband receivers working at LTE bands. The proposed triplexer is simulated, fabricated and measured. Simulation and experimental results of scattering parameters are in good agreement. This structure comprises these specifications: insertion loss less than 2 dB, isolation between channels approximately 20 dB and about 5% fractional bandwidth regarding VSWR < 1.5. The proposed triplexer's dimensions are 0.07λ0 × 0.2λ0.

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http://hdl.handle.net/10453/161147