Transient simulation and analysis for saturated core high temperature superconducting fault current limiter

Cuixia, Z; Shuhong, W; Jie, Q; Jian, GZ; Youguang, G; Weizhi, G; Zhengjian, C

Transient simulation and analysis for saturated core high temperature superconducting fault current limiter

Cuixia, Z Shuhong, W Jie, Q Jian, GZ Youguang, G Weizhi, G Zhengjian, C

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Publisher:: Institute of Electrical and Electronics Engineers (IEEE)
Publication Type:: Conference Proceeding
Citation:: 12th Biennial IEEE Conference on Electromagnetic Field Computation, CEFC 2006, 2006, pp. 503-503
Issue Date:: 2006-11-21

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Field	Value	Language
dc.contributor.author	Cuixia, Z
dc.contributor.author	Shuhong, W
dc.contributor.author	Jie, Q
dc.contributor.author	Jian, GZ
dc.contributor.author	Youguang, G
dc.contributor.author	Weizhi, G
dc.contributor.author	Zhengjian, C
dc.date.accessioned	2023-03-10T09:46:51Z
dc.date.available	2023-03-10T09:46:51Z
dc.date.issued	2006-11-21
dc.identifier.citation	12th Biennial IEEE Conference on Electromagnetic Field Computation, CEFC 2006, 2006, pp. 503-503
dc.identifier.isbn	1424403200
dc.identifier.isbn	9781424403202
dc.identifier.uri	http://hdl.handle.net/10453/166991
dc.description.abstract	In this paper, the transient performance of a magnetic core fault current limiter (FCL) saturated by high temperature superconducting (HTS) DC bias winding is investigated by using 3-dimensional (3D) field-circuit coupled simulation. A high voltage is induced on the DC HTS winding during the fault current state. The induced voltage is computed and some possible methods to reduce it are studied. The numerical computations are verified by the experiment results on an FCL prototype. © 2006 IEEE.
dc.language	en
dc.publisher	Institute of Electrical and Electronics Engineers (IEEE)
dc.relation.ispartof	12th Biennial IEEE Conference on Electromagnetic Field Computation, CEFC 2006
dc.relation.ispartof	2006 12th Biennial IEEE Conference on Electromagnetic Field Computation
dc.relation.isbasedon	10.1109/CEFC-06.2006.1633293
dc.rights	info:eu-repo/semantics/openAccess
dc.title	Transient simulation and analysis for saturated core high temperature superconducting fault current limiter
dc.type	Conference Proceeding
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
utslib.copyright.status	open_access	*
dc.date.updated	2023-03-10T09:46:50Z
pubs.publication-status	Published

Abstract:

In this paper, the transient performance of a magnetic core fault current limiter (FCL) saturated by high temperature superconducting (HTS) DC bias winding is investigated by using 3-dimensional (3D) field-circuit coupled simulation. A high voltage is induced on the DC HTS winding during the fault current state. The induced voltage is computed and some possible methods to reduce it are studied. The numerical computations are verified by the experiment results on an FCL prototype. © 2006 IEEE.

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http://hdl.handle.net/10453/166991