In-line test structures for yield improvement in MEMS/NEMS device
- Publisher:
- IEEE
- Publication Type:
- Conference Proceeding
- Citation:
- 2022 IEEE 24th Electronics Packaging Technology Conference (EPTC), 2023, 00, pp. 242-245
- Issue Date:
- 2023-01-18
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| Filename | Description | Size | |||
|---|---|---|---|---|---|
| In-line_test_structures_for_yield_improvement_in_MEMS_NEMS_device.pdf | Published version | 2.86 MB |
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The integration of novel process flows for the fabrication of microelectromechanical system MEMS and nanoelectromechanical system NEMS devices invariably requires an initial round of short loops to qualify the critical process steps prior to full device fabrication This paper presents some of the initial short loop based in line qualification results obtained during the fabrication of zero power wake up acceleration switches fabricated on silicon on insulator SOI wafers with 1 m buried oxide BOX for a range of active silicon thicknesses Narrow trench openings in the silicon device layer is a common requirements in the fabrication of MEMS and NEMS devices in SOI Isolation across narrow gaps was verified in line through electrical measurements corroborated by cross sectional inspections from scanning electron micrographs SEM Similarly the release of MEMS structures by vapor hydrofluoric acid VHF was verified by in line infrared IR inspection metrology tool after removing the metal from the test structures to be inspected These test structures for in line metrology inspection help shorten the fabrication time and improve the yield of the final fabricated device
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