A Millimeter-Wave Input-Reflectionless Amplifier in 45-nm SOI CMOS Technology
- Publisher:
- Institute of Electrical and Electronics Engineers (IEEE)
- Publication Type:
- Conference Proceeding
- Citation:
- Proceedings - IEEE International Symposium on Circuits and Systems, 2024, 00, pp. 1-5
- Issue Date:
- 2024-01-01
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| Filename | Description | Size | |||
|---|---|---|---|---|---|
| 1737320.pdf | Published version | 1.1 MB |
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An input-reflectionless RF amplifier operated at millimeter-wave (mm-wave) frequencies is reported in this paper. Its design methodology allowing it to attain a broadband RF-input-power-absorption behavior is detailed through the circuit analysis of the designed amplifier. For practical-demonstration purposes, a single-stage cascode input-reflectionless amplifier chip is fabricated and tested using 45-nm silicon-on-insulator (SOI) CMOS technology. Under a 1.2-V power supply, the DC-power consumption of the designed amplifier is 5.3 mW. It has a peak gain of 5.3 dB at 31 GHz. Moreover, the measured input 1-dB compression point (P1dB) is around -2.6 dBm. The measured input-power-matching levels of the designed amplifier are higher than 10 dB from DC to 60 GHz. In addition, a two-stage amplifier is also designed in simulation by cascading a conventional cascode amplifier with the proposed single-stage reflectionless amplifier. Simulation results show that a good improvement in terms of signal-to-interference ratio is achievable. The core size of the designed input-reflectionless amplifier is only 0.25 × 0.7 mm2
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