A K-Band Frequency Doubler with 35-dB Fundamental Rejection Based on Novel Transformer Balun in 0.13-μm SiGe Technology

Chakraborty, S; Milner, LE; Zhu, X; Hall, LT; Sevimli, O; Heimlich, MC

A K-Band Frequency Doubler with 35-dB Fundamental Rejection Based on Novel Transformer Balun in 0.13-μm SiGe Technology

Chakraborty, S Milner, LE Zhu, X

Hall, LT Sevimli, O Heimlich, MC

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Publication Type:: Journal Article
Citation:: IEEE Electron Device Letters, 2016, 37 (11), pp. 1375 - 1378
Issue Date:: 2016-11-01

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Field	Value	Language
dc.contributor.author	Chakraborty, S	en_US
dc.contributor.author	Milner, LE	en_US
dc.contributor.author	Zhu, X https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Hall, LT	en_US
dc.contributor.author	Sevimli, O	en_US
dc.contributor.author	Heimlich, MC	en_US
dc.date.issued	2016-11-01	en_US
dc.identifier.citation	IEEE Electron Device Letters, 2016, 37 (11), pp. 1375 - 1378	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://hdl.handle.net/10453/99291
dc.description.abstract	© 2016 IEEE. A compact balanced frequency doubler with more than 35 dB odd-harmonic rejection and fractional bandwidth of 73% is presented in this letter. Wide bandwidth and high odd-harmonic suppression is achieved by adopting a new technique for the transformer balun design, resulting in a very low magnitude imbalance of 0.13 dB and a phase imbalance of 0.4° over 7-15 GHz. The balun performance is improved by offsetting the radius of the primary and secondary coils, which reduces the parasitic coupling capacitance. The input and output frequency ranges for the doubler are 7-15 GHz and 14-30 GHz respectively. The circuit was fabricated in 0.13-μm SiGe technology. The chip size is 0.6 mm ×, 0.4 mm.	en_US
dc.relation.ispartof	IEEE Electron Device Letters	en_US
dc.relation.isbasedon	10.1109/LED.2016.2611535	en_US
dc.subject.classification	Applied Physics	en_US
dc.title	A K-Band Frequency Doubler with 35-dB Fundamental Rejection Based on Novel Transformer Balun in 0.13-μm SiGe Technology	en_US
dc.type	Journal Article
utslib.citation.volume	11	en_US
utslib.citation.volume	37	en_US
utslib.for	0906 Electrical and Electronic Engineering	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
utslib.copyright.status	closed_access
pubs.issue	11	en_US
pubs.publication-status	Published	en_US
pubs.volume	37	en_US

Abstract:

© 2016 IEEE. A compact balanced frequency doubler with more than 35 dB odd-harmonic rejection and fractional bandwidth of 73% is presented in this letter. Wide bandwidth and high odd-harmonic suppression is achieved by adopting a new technique for the transformer balun design, resulting in a very low magnitude imbalance of 0.13 dB and a phase imbalance of 0.4° over 7-15 GHz. The balun performance is improved by offsetting the radius of the primary and secondary coils, which reduces the parasitic coupling capacitance. The input and output frequency ranges for the doubler are 7-15 GHz and 14-30 GHz respectively. The circuit was fabricated in 0.13-μm SiGe technology. The chip size is 0.6 mm ×, 0.4 mm.

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