Quantum Computing, Complexity and Silicon Spin Qubit Architectures

Publication Type:
Thesis
Issue Date:
2023
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This work describes two research programs. The first is, an architecture for a scalable quantum computer based on MOS quantum dots arranged in narrow qubit lattices. To circumvent traditionally low thresholds of small fixed-width arrays, we deliberately engineer an error bias at the lowest level of encoding using the surface code and exploit this engineered bias at a higher level of encoding using either a lattice-surgery surface code bus that exploits this bias or a repetition code to make logical qubits with unbiased errors out of biased surface code qubits. Arbitrarily low error rates can be reached by further concatenating with other codes, such as Steane’s [[7,1,3]] code and the [[15,7,3]] CSS code. This enables a scalable quantum computing architecture on a narrow strip of qubit lattice only 19 qubits wide, given physical qubits with an error rate of 8.0x10^-4. It is accompanied by a comprehensive description of a silicon MOS-based quantum computer that exploits these narrow qubit lattices. In the second, we establish a theory of parameterized computational complexity for quantum computers, introducing quantum analogues for a range of parameterized complexity classes and examining the relationship between these classes, their classical counterparts, and well-studied problems.
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