A sparse spin qubit array with integrated control electronics

Publication Type:
Conference Proceeding
Technical Digest - International Electron Devices Meeting, IEDM, 2019, 2019-December
Issue Date:
Full metadata record
© 2019 IEEE. Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.
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