CMOS Rectifier Design with Power Management for Indoor Light and RF Energy Harvesting Wireless Sensor Nodes
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There is a vast potential for using wireless sensor networks and IoT devices to improve the efficiency and quality of manufacturing operations. It will also enable energy efficiency, increase demand for responsive building, interconnected and full-operational smart grid systems, and other futuristic next-level energy and infrastructure systems. These promising devices are expected to work autonomously for years with no recharging, no human intervention, and no updates. There are two possible solutions to address the energy needs of these power-hungry devices. One is the reduction of the power consumption of the device's internal circuitry, and the other is the continuous-intermittent charging of the device battery through ambient energy harvesting to extend longevity. Henceforth, this work focused on the integrated circuits design and implementation of the energy harvesting and power management component blocks for its future integration on the system-on-chip IoT device. The harvesting performance relies on the circuit design integrity of the rectifier circuit block, which is the essential building block of all sources of energy harvesting systems. Thus, this thesis presents novel circuit design techniques for CMOS-based rectifiers with an enhanced voltage-conversion ratio and power conversion efficiency. Two rectifiers are designed in 65-nm CMOS technology to develop indoor light and 2.4-GHz RF energy harvesting using the split-capacitor and auxiliary path techniques in the cross-coupled differential drive structure. Moreover, the unconventional DC-DC boosting technique for processing the voltage required by the load from a single unit of 0.5-V rating PV cell is also highlighted in this thesis. Utilizing a rectifier circuit block instead of the conventional charge-pump circuit after signal pre-processing from the oscillator and buffer driver circuit block offers an alternate technique for the system energy harvesting design that requires dual or multiple energy sources, like RF+PV harvesters. This thesis also proposes a power-management circuit design implementation in 65 nm CMOS technology to possibly reduce the power consumption of the internal circuitry of the sensor node device. The study explored using a power-down control mechanism implementation to a particular circuit block of the power management and energy harvesting unit with the preliminary performance of the DC-DC boost and LDO block.
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