FPGA based formation control of multiple ubiquitous indoor robots

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This thesis explores the feasibility of using Field-Programmable Gate Array (FPGA) technology for formation control of multiple indoor robots in an ubiquitous computing environment. It is anticipated that in the future, computers will become integrated with people’s daily lives. By way of a hub of surrounding sensors, computers and embedded systems, indoor robots will receive commands from users and execute tasks such as home and office chores in a cooperative manner. Important requirements for such scenarios are power efficiency and computation reliability. The focuses of this project are on exploiting the use of the System-on-Programmable Chip technology and ambient intelligence in developing suitable control strategies for the deployment of multiple indoor robots moving in desired geometric patterns. After surveying the current problems associated with computing systems and robotics, this research was determined to design an ubiquitous robotics system using Field-Programmable Gate Array (FPGA) technology, a serial of the Register-Transfer Level (RTL) and gate level hardware for image processing, and control implementation. Work was done to develop novel, FPGA-feasible algorithms for colour identification, object detection, motion tracking, inter-robot distance estimation, trajectory generation and formation turning. These algorithms were integrated on a single FPGA chip to improve energy efficiency and real-time reliability. With the use of infrared sensors and a global high-resolution digital camera for environment sensing, all computation required for data acquisition, image processing, and closed-loop servo control was then performed on an FPGA chip as an external server. Battery-powered miniature mobile robots, Eyebots, were used as a test-bed for experiments. For realization, all the proposed algorithms were implemented and demonstrated via real-life video snapshots as shown on a PC monitor. These live images were captured from the on-board digital camera and then directly output to the monitor from a VGA interface of the FPGA platform. These together serve as the main contributions of this thesis, in both algorithm development and chip design verified by experiments. The digital circuit designs in the chip were simulated using software specifically developed for FPGAs in order to show the timing waveforms of the chip. Experimental results demonstrated the technical feasibility of the proposed architecture for initialization and maintenance of a line formation of three robots. Effectiveness was verified through the percentage usage of the chip capacity and its power consumption. The prototype of this ubiquitous robotic system could be improved for promising applications in home robotics or for concrete finishing in construction automation.
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