Nanocapacitive circuit elements

Zareie, HM; Morgan, SW; Moghaddam, M; Maaroof, AI; Cortie, MB; Phillips, MR

Nanocapacitive circuit elements

Zareie, HM Morgan, SW Moghaddam, M Maaroof, AI Cortie, MB

Phillips, MR

Permalink

Publication Type:: Journal Article
Citation:: ACS Nano, 2008, 2 (8), pp. 1615 - 1619
Issue Date:: 2008-08-01

Open Access

Copyright Clearance Process

Recently Added
In Progress
Open Access

This item is open access.

Adobe PDF

Download full textAdobe PDF (1.59 MB)

View on publisher's site

View statistics

Full metadata record

Field	Value	Language
dc.contributor.author	Zareie, HM	en_US
dc.contributor.author	Morgan, SW	en_US
dc.contributor.author	Moghaddam, M	en_US
dc.contributor.author	Maaroof, AI	en_US
dc.contributor.author	Cortie, MB https://orcid.org/0000-0003-3202-6398	en_US
dc.contributor.author	Phillips, MR https://orcid.org/0000-0003-1522-9281	en_US
dc.date.issued	2008-08-01	en_US
dc.identifier.citation	ACS Nano, 2008, 2 (8), pp. 1615 - 1619	en_US
dc.identifier.issn	1936-0851	en_US
dc.identifier.uri	http://hdl.handle.net/10453/9166
dc.description.abstract	"Natural" lithography was used to prepare arrays of nanoscale capacitors on silicon. The capacitance was verified by a novel technique based on the interaction of a charged substrate with the electron beam of a scanning electron microscope. The "nanocapacitors" possessed a capacitance of ∼1 × 10-16F and were observed to hold charge for over an hour. Our results indicate that fabricating nanostructures using natural lithography may provide a viable alternative for future nanoelectronic devices. © 2008 American Chemical Society.	en_US
dc.relation.ispartof	ACS Nano	en_US
dc.relation.isbasedon	10.1021/nn800053x	en_US
dc.subject.classification	Nanoscience & Nanotechnology	en_US
dc.subject.mesh	Macromolecular Substances	en_US
dc.subject.mesh	Crystallization	en_US
dc.subject.mesh	Equipment Design	en_US
dc.subject.mesh	Equipment Failure Analysis	en_US
dc.subject.mesh	Materials Testing	en_US
dc.subject.mesh	Molecular Conformation	en_US
dc.subject.mesh	Electric Capacitance	en_US
dc.subject.mesh	Particle Size	en_US
dc.subject.mesh	Surface Properties	en_US
dc.subject.mesh	Electronics	en_US
dc.subject.mesh	Nanotechnology	en_US
dc.subject.mesh	Nanostructures	en_US
dc.title	Nanocapacitive circuit elements	en_US
dc.type	Journal Article
utslib.citation.volume	8	en_US
utslib.citation.volume	2	en_US
utslib.for	0912 Materials Engineering	en_US
dc.location.activity	ISI:000258775000014	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Science
pubs.organisational-group	/University of Technology Sydney/Faculty of Science/School of Mathematical and Physical Sciences
pubs.organisational-group	/University of Technology Sydney/Strength - CCET - Centre for Clean Energy Technology
utslib.copyright.status	open_access
pubs.issue	8	en_US
pubs.publication-status	Published	en_US
pubs.volume	2	en_US

Abstract:

"Natural" lithography was used to prepare arrays of nanoscale capacitors on silicon. The capacitance was verified by a novel technique based on the interaction of a charged substrate with the electron beam of a scanning electron microscope. The "nanocapacitors" possessed a capacitance of ∼1 × 10-16F and were observed to hold charge for over an hour. Our results indicate that fabricating nanostructures using natural lithography may provide a viable alternative for future nanoelectronic devices. © 2008 American Chemical Society.

Please use this identifier to cite or link to this item:

http://hdl.handle.net/10453/9166